Owns and drives the AMS/DMS verification methodology and long term roadmap, ensuring alignment of tools, flows, standards and strategic technology decisions throughout the organization. * Develops and leads the maintenance of high quality AMS/DMS behavioral models and reusable model libraries (EEnet/UDN), defining modeling standards and ensuring consistency across products * Runs DMS simulations and correlates them with transistor level Spectre results, performing root cause analysis, refining models, and using analog judgment to distinguish real circuit issues from modeling limitations * Builds, extends, and maintains DMS verification environments using SystemVerilog and UVM MS, including testbenches, mixed signal assertions, critical scenarios, and coverage. * Defines AMS/DMS coverage metrics and formal sign off criteria, including coverage closure, transistor level ...
mehr